• Hardware enthusiast interested in Computer Architecture and Digital VLSI.

• Senior (4th Year) Bachelor of Technology (BTech) in Electrical and Electronics Engineering at the National Institute of Technology Karnataka, Surathkal.

• Research Assistant at Computer Aided Design Lab, SERC, IISc Bengaluru, currently working on router monitoring in hardware for the group’s REDEFINE reconfigurable silicon platform.

• Former Student Developer with Free and Open Source Silicon (FOSSi) Foundation under Google Summer of Code (GSoC) 2020, working on integration of WARP-V, a Transaction-Level Verilog based CPU core with Princeton Parallel Group’s OpenPiton, a heterogenous ISA manycore research platform.

• I love open-source hardware projects and always excited for collaboration on the same.

• I have worked in the Wadhwani Electronics Lab, EE Department, IIT Bombay during Summer of 2019.

• Community Member, RISC-V International and Student Member, ACM SIGARCH

Check out my CV to know more!